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A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC., , , and . ISCAS, page 485-488. IEEE, (2007)A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN., , , , , , , and . CICC, page 1-4. IEEE, (2014)A 90-nm CMOS Doherty power amplifier with minimum AM-PM distortion., , and . IEEE J. Solid State Circuits, 41 (6): 1323-1332 (2006)A 10 mW 60GHz 65nm CMOS DCO with 24% tuning range and 40 kHz frequency granularity., , and . CICC, page 1-4. IEEE, (2015)A stepped-frequency continuous wave ranger for aiding pedestrian navigation., , , and . WiSNet, page 28-30. IEEE, (2013)A 25-30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication., , , and . IEEE J. Solid State Circuits, 53 (5): 1275-1287 (2018)A supply-voltage scalable, 45 nm CMOS ultra-wideband receiver for mm-wave ranging and communication., , and . CICC, page 1-4. IEEE, (2012)A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs., , and . IEEE J. Solid State Circuits, 52 (12): 3329-3347 (2017)Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems., , , , and . ICASSP, page 1585-1588. IEEE, (2011)A Deep Reinforcement Learning Framework for High-Dimensional Circuit Linearization., , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (9): 3665-3669 (2022)