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Disambiguation of "Atallah, Francois"

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A 7nm All-Digital Unified Voltage and Frequency Regulator Based on a High-Bandwidth 2-Phase Buck Converter with Package Inductors.

, , , , , , , , , , , , , and . ISSCC, page 316-318. IEEE, (2019)

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Eve Atallah

Atallah Balalem

Sadik Atallah

Mohammad Atallah

Fouad Atallah

 

Other publications of authors with the same name

A 7nm All-Digital Unified Voltage and Frequency Regulator Based on a High-Bandwidth 2-Phase Buck Converter with Package Inductors., , , , , , , , , and 4 other author(s). ISSCC, page 316-318. IEEE, (2019)8.5 A 16nm auto-calibrating dynamically adaptive clock distribution for maximizing supply-voltage-droop tolerance across a wide operating range., , , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 7nm Leakage-Current-Supply Circuit for LDO Dropout Voltage Reduction., , , , , , , , , and 2 other author(s). VLSI Circuits, page 126-. IEEE, (2019)Adaptive power gating of 32-bit Kogge Stone adder., , , , , and . Integr., (2016)A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range., , , , , , , , , and . IEEE J. Solid State Circuits, 51 (1): 8-17 (2016)Digitally-assisted leakage current supply circuit for reducing the analog LDO minimum dropout voltage., , , , , , and . CICC, page 1-4. IEEE, (2017)Exploiting error-correcting codes for cache minimum supply voltage reduction while maintaining coverage for radiation-induced soft errors., , , , , , , and . CICC, page 1-4. IEEE, (2014)Trading-off on-die observability for cache minimum supply voltage reduction in system-on-chip (SoC) processors., , , , , , , and . ITC, page 1. IEEE Computer Society, (2014)A 16nm configurable pass-gate bit-cell register file for quantifying the VMIN advantage of PFET versus NFET pass-gate bit cells., , , , , and . CICC, page 1-4. IEEE, (2015)