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Disambiguation of "Lee, Kang-Yoon"

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A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications.

, , , , , , , , , , and . IEEE Access, (2020)

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Yoon-Jick Lee

Yoon-Joon Lee

Kang-Hun Lee

Lee-Kang Liu

Kang Ro Lee

 

Other publications of authors with the same name

3.7V high frequency DC-DC synchronous boost converter with smooth loop handover., , , and . ISCIT, page 191-194. IEEE, (2014)A design of ultra-low noise LDO using noise reduction network techniques., , , , , , and . ISOCC, page 198-199. IEEE, (2017)Internal circuit offset auto compensation current sensor for wireless power systems., , , and . ISOCC, page 176-177. IEEE, (2017)A design of ultra low power I2C synchronous slave controller with interface voltage level independency in 180 nm CMOS technology., , , , and . ISOCC, page 262-263. IEEE, (2017)Design of asynchronous SAR ADC for low power mixed signal applications., , , , and . ISOCC, page 222-223. IEEE, (2017)Design of a capacitor-less LDO with high PSRR for RF energy harvesting applications., , , , and . ISOCC, page 202-203. IEEE, (2017)A Design of Fast-Settling, Low-Power 4.19-MHz Real-Time Clock Generator With Temperature Compensation and 15-dB Noise Reduction., , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (6): 1151-1158 (2018)84 dB DC-gain two-stage class-AB OTA., , , , and . IET Circuits Devices Syst., 13 (5): 614-621 (2019)A 10-bit 1 MS/s segmented Dual-Sampling SAR ADC with reduced switching energy., , , , , , , , , and . Microelectron. J., (2017)All-Digital Bandwidth Mismatch Calibration of TI-ADCs Based on Optimally Induced Minimization., , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (5): 1175-1184 (2020)