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Другие публикации лиц с тем же именем

Exploring Chapel Productivity Using Some Graph Algorithms., , , , , и . IPDPS Workshops, стр. 672. IEEE, (2020)StAdHyTM: A Statically Adaptive Hybrid Transactional Memory: A scalability study on large parallel graphs., , и . CCWC, стр. 1-7. IEEE, (2017)Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization., , и . IPCCC, стр. 372-379. IEEE Computer Society, (2007)Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity., , и . SIGMETRICS, стр. 252-253. ACM, (2002)Local memory store (LMStr): A hardware controlled shared scratchpad for multicores., , , и . SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI, стр. 1-6. IEEE, (2017)Superstrider associative array architecture: Approved for unlimited unclassified release: SAND2017-7089 C., , , и . HPEC, стр. 1-7. IEEE, (2017)The Performance Implication of Task Size for Applications on the HPX Runtime System., , , и . CLUSTER, стр. 682-689. IEEE Computer Society, (2015)The Superstrider Architecture: Integrating Logic and Memory Towards Non-Von Neumann Computing., , , и . ICRC, стр. 1-8. IEEE, (2017)A performance study of the time-varying cache behavior: a study on APEX, Mantevo, NAS, and PARSEC., , , и . J. Supercomput., 74 (2): 665-695 (2018)LMStr: exploring shared hardware controlled scratchpad memory for multicores., , , и . MEMSYS, стр. 152-165. ACM, (2017)