Author of the publication

How to Keep 4-Eyes Principle in a Design and Property Generation Flow.

, , and . MBMV, page 1-6. VDE Verlag, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Devarajegowda, Keerthikumara
add a person with the name Devarajegowda, Keerthikumara
 

Other publications of authors with the same name

Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications., , , , , and . Microprocess. Microsystems, (2019)How to Keep 4-Eyes Principle in a Design and Property Generation Flow., , and . MBMV, page 1-6. VDE Verlag, (2019)Extending Verilator to Enable Fault Simulation., , , , , and . MBMV, page 1-6. VDE/IEEE, (2021)Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models., , , , , , , and . DFT, page 1-6. IEEE, (2021)Model-based Generation of Assertions for Pre-silicon Verification.. Kaiserslautern University of Technology, Germany, (2021)Embedded Systems' Automation following OMG's Model Driven Architecture Vision., , , , and . DATE, page 1301-1306. IEEE, (2019)Meta-model Based Automation of Properties for Pre-Silicon Verification., and . VLSI-SoC, page 231-236. IEEE, (2018)Gap-free Processor Verification by S2QED and Property Generation., , , , , , , and . DATE, page 526-531. IEEE, (2020)Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning., , , , and . CIMA@ICTAI, volume 2252 of CEUR Workshop Proceedings, page 14-27. CEUR-WS.org, (2018)Transformative Hardware Design Following the Model-Driven Architecture Vision., , , , , , , and . VLSI-SoC (Selected Papers), volume 661 of IFIP Advances in Information and Communication Technology, page 49-70. Springer, (2021)