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Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder.

G. Corrêa, D. Palomino, C. Diniz, S. Bampi, and L. Agostini. VLSI Design, (2012)

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Nicole Hillenbrand Palomino

Reynaldo Linares-Palomino

Nahomi Castro-Palomino Laria

Julio Castro-Palomino Laria

Daniel

Other publications of authors with the same name

A Hardware Design for the Multi-Transform Module of the Versatile Video Coding Standard.B. Silveira, D. Palomino, C. Diniz, and G. Corrêa. SBCCI, page 1-6. IEEE, (2023)AV1 and VVC Video Codecs: Overview on Complexity Reduction and Hardware Design.M. Corrêa, M. Saldanha, A. Borges, G. Corrêa, D. Palomino, M. Porto, B. Zatt, and L. Agostini. IEEE Open J. Circuits Syst., (2021)Speedup-aware history-based tiling algorithm for the HEVC standard.I. Storch, D. Palomino, B. Zatt, and L. Agostini. ICIP, page 824-828. IEEE, (2016)Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder.G. Corrêa, D. Palomino, C. Diniz, S. Bampi, and L. Agostini. VLSI Design, (2012)Speedup evaluation of HEVC parallel video coding using Tiles.I. Storch, D. Palomino, B. Zatt, and L. Agostini. J. Real Time Image Process., 17 (5): 1469-1486 (2020)Configurable Cache Memory Architecture for Low-Energy Motion Estimation.A. Martins, W. Penny, M. Weber, L. Agostini, M. Porto, D. Palomino, J. de Mattos, and B. Zatt. ISCAS, page 1-5. IEEE, (2018)Compression Efficiency and Computational Cost Comparison between AV1 and HEVC Encoders.I. Bender, D. Palomino, L. Agostini, G. Corrêa, and M. Porto. EUSIPCO, page 1-5. IEEE, (2019)Encoding Efficiency and Computational Cost Assessment of State-Of-The-Art Point Cloud Codecs.M. Gonçalves, L. Agostini, D. Palomino, M. Porto, and G. Corrêa. ICIP, page 3726-3730. IEEE, (2019)Mode-Adaptive Subsampling of SAD/SSE Operations for Intra Prediction Cost Reduction.M. Corrêa, N. Roma, D. Palomino, G. Corrêa, and L. Agostini. ISCAS, page 1808-1812. IEEE, (2022)GPU-Acceleration of Affine Prediction in the Versatile Video Coding.I. Storch, D. Palomino, and S. Bampi. ISCAS, page 429-433. IEEE, (2022)

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Disambiguation of "Palomino, Daniel"

copy delete add this publication to your clipboard
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Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder.

Please choose a person to relate this publication to

Nicole Hillenbrand Palomino

Reynaldo Linares-Palomino

Nahomi Castro-Palomino Laria

Julio Castro-Palomino Laria

Daniel

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Palomino, Daniel"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder.

Please choose a person to relate this publication to

Nicole Hillenbrand Palomino

Reynaldo Linares-Palomino

Nahomi Castro-Palomino Laria

Julio Castro-Palomino Laria

Daniel

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
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Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder.