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Disambiguation of "Jerraya, Ahmed Amine"

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IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems.

, , , and . ASP-DAC, page 612-618. ACM Press, (2005)

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Wassim Amine

Abu Bakr Ahmed Amine Nassr

Amine Ahriche

Amine Chaieb

Amine Bouabdallah

 

Other publications of authors with the same name

Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration., , , , and . ASP-DAC, page 969-972. ACM Press, (2005)Interactive System-level Partitioning with PARTIF., , and . EDAC-ETC-EUROASIC, page 464-468. IEEE Computer Society, (1994)Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip., , , , and . Des. Autom. Embed. Syst., 11 (2-3): 167-191 (2007)AMICAL: Architectural Synthesis based on VHDL., , and . Synthesis for Control Dominated Circuits, volume A-22 of IFIP Transactions, page 219-234. North-Holland, (1992)A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (9): 1744-1757 (2019)Communication Optimizations for Multithreaded Code Generation from Simulink Models., , , , , , , and . ACM Trans. Embed. Comput. Syst., 14 (3): 59:1-59:26 (2015)A Loop-Based Scheduling Algorithm for Hardware Description Languages., , and . Parallel Process. Lett., (1994)System-on-a-Chip Cosimulation and Compilation., , , , and . IEEE Des. Test Comput., 14 (2): 16-25 (1997)Hardware/software co-design of an ATM network interface card: a case study., , and . CODES, page 111-115. IEEE Computer Society, (1998)A unified model for co-simulation and co-synthesis of mixed hardware/software systems., , , , , and . ED&TC, page 180-184. IEEE Computer Society, (1995)