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A 0.40pJ/cycle 981 μm2 voltage scalable digital frequency generator for SoC clocking.

M. Cochet, S. Clerc, G. Lallement, F. Abouzeid, P. Roche, and J. Autran. A-SSCC, page 69-72. IEEE, (2017)

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Jörg Roche

Christophe Roche

Horst Roche

Sophie Roche

Georg Roche

Other publications of authors with the same name

Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system.P. Vanhauwaert, M. Portolan, R. Leveugle, and P. Roche. ICECS, page 113-116. IEEE, (2008)2P2Idb: a structural database dedicated to orthosteric modulation of protein-protein interactions.M. Basse, S. Betzi, R. Bourgeas, S. Bouzidi, B. Chétrit, V. Hamon, X. Morelli, and P. Roche. Nucleic Acids Res., 41 (Database-Issue): 824-827 (2013)Muons and thermal neutrons SEU characterization of 28nm UTBB FD-SOI and Bulk eSRAMs.G. Gasiot, D. Soussan, J. Autran, V. Malherbe, and P. Roche. IRPS, page 2. IEEE, (2015)Reduced Instrumentation and Optimized Fault Injection Control for Dependability Analysis.P. Vanhauwaert, R. Leveugle, and P. Roche. VLSI-SoC, page 391-396. IEEE, (2006)Soft-Error Rate of Advanced SRAM Memories: Modeling and Monte Carlo SimulationJ. Autran, S. Semikh, D. Munteanu, S. Serre, G. Gasiot, and P. Roche. Numerical Simulation -- From Theory to Industry, chapter 15, InTech, (September 2012)CovaDOTS: In Silico Chemistry-Driven Tool to Design Covalent Inhibitors Using a Linking Strategy.L. Hoffer, M. Saez-Ayala, D. Horvath, A. Varnek, X. Morelli, and P. Roche. J. Chem. Inf. Model., 59 (4): 1472-1485 (2019)Software Product Reliability Based on Basic Block Metrics Recomposition.T. Fiorucci, G. Natale, J. Daveau, and P. Roche. IOLTS, page 1-5. IEEE, (2022)Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital Systems.T. Fiorucci, J. Daveau, G. Natale, and P. Roche. IOLTS, page 1-6. IEEE, (2021)A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI.G. Lallement, F. Abouzeid, M. Cochet, J. Daveau, P. Roche, and J. Autran. ESSCIRC, page 153-162. IEEE, (2017)An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities.J. Flaquer, J. Daveau, L. Naviner, and P. Roche. IOLTS, page 98-103. IEEE Computer Society, (2011)

BibSonomy

Disambiguation of "Roche, Philippe"

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A 0.40pJ/cycle 981 μm2 voltage scalable digital frequency generator for SoC clocking.

Please choose a person to relate this publication to

Jörg Roche

Christophe Roche

Horst Roche

Sophie Roche

Georg Roche

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Roche, Philippe"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.40pJ/cycle 981 μm2 voltage scalable digital frequency generator for SoC clocking.

Please choose a person to relate this publication to

Jörg Roche

Christophe Roche

Horst Roche

Sophie Roche

Georg Roche

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.40pJ/cycle 981 μm2 voltage scalable digital frequency generator for SoC clocking.