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Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder.

, , and . ICECS, page 733-736. IEEE, (2002)

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Nouvelles architectures génériques de NoC., , , and . Technique et Science Informatiques, 28 (1): 101-133 (2009)Constrained algorithmic IP design for system-on-chip., , , , and . Integr., 40 (2): 94-105 (2007)A new approach for encryption system based on block cipher algorithms and logistic function., , , and . SSD, page 1-5. IEEE, (2015)Performance evaluation and design considerations of lightweight block cipher for low-cost embedded devices., , , , , and . AICCSA, page 1-7. IEEE Computer Society, (2016)A design methodology for IP integration., , and . ISCAS (4), page 711-714. IEEE, (2002)MIC@R : A Generic Low Latency Router for On-Chip Networks., , and . ICECS, page 999-1002. IEEE, (2007)Co-simulation and communication synthesis approach for intellectual properties based SoCs., , , and . Comput. Electr. Eng., 30 (5): 361-381 (2004)Design and Hardware Implementation of QoSS - AES Processor for Multimedia applications., , , , , and . Trans. Data Priv., 3 (1): 43-64 (2010)IP cores integration in DSP System-on-chip designs., , and . EUSIPCO, page 1-4. IEEE, (2002)Efficient Hybrid Encryption System Based on Block Cipher and Chaos Generator., , , , , and . CIT, page 375-382. IEEE Computer Society, (2016)