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A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm., , , , , , , , , and 33 other author(s). ISSCC, page 420-421. IEEE, (2008)11.1 A 512Gb 3b/cell flash memory on 64-word-line-layer BiCS technology., , , , , , , , , and 47 other author(s). ISSCC, page 196-197. IEEE, (2017)A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology., , , , , , , , , and 33 other author(s). IEEE J. Solid State Circuits, 44 (1): 186-194 (2009)A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface., , , , , , , , , and 37 other author(s). IEEE J. Solid State Circuits, 58 (1): 316-328 (2023)A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory With a 2.4-Gb/s I/O Speed Interface., , , , , , , , , and 39 other author(s). ISSCC, page 130-132. IEEE, (2022)A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface., , , , , , , , , and 45 other author(s). ISSCC, page 422-424. IEEE, (2012)A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS., , , , , , , , , and 47 other author(s). ISSCC, page 246-247. IEEE, (2009)