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Optimal time borrowing analysis and timing budgeting optimization for latch-based designs., , , and . ACM Trans. Design Autom. Electr. Syst., 7 (1): 217-230 (2002)An efficient layout style for two-metal CMOS leaf cells and its automatic synthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (3): 410-424 (1993)Incorporating land-use regression into machine learning algorithms in estimating the spatial-temporal variation of carbon monoxide in Taiwan, , , , , , , , and . Environmental Modelling & Software, (2021)Layout Modeling and Design Space Exploration in Pss1 System., and . VLSI Design, 5 (2): 211-221 (1997)Domain-Specific High-Level Modeling and Synthesis for ATM Switch Design Using VHDL., , , and . DAC, page 585-590. ACM Press, (1996)A new approach to schedule operations across nested-ifs and nested-loops., , , and . MICRO, page 268-271. ACM / IEEE Computer Society, (1992)A Comparison of Functional and Structural Partitioning., , and . ISSS, page 121-126. ACM / IEEE Computer Society, (1996)Floor Planning and Global Routing in an Automated Chip Design System. University of Illinois Urbana-Champaign, USA, (1987)Synthesis of false loop free circuits., , , and . ASP-DAC, ACM, (1995)Intelligent Chips and Technologies for AIoT Era., and . A-SSCC, page 1-4. IEEE, (2020)