Author of the publication

ArChiVED: Architectural checking via event digests for high performance validation.

, , , , and . DATE, page 1-6. European Design and Automation Association, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Gate-Level Simulation with GPU Computing., , and . ACM Trans. Design Autom. Electr. Syst., 16 (3): 30:1-30:26 (2011)SystemC simulation on GP-GPUs: CUDA vs. OpenCL., , , and . CODES+ISSS, page 343-352. ACM, (2012)Addressing verification challenges of heterogeneous systems based on IBM POWER9., , , , , , , , , and 1 other author(s). IBM J. Res. Dev., 62 (4/5): 11:1-11:12 (2018)Return-oriented programming protection in the IBM POWER10., , , and . CF, page 173-176. ACM, (2022)ArChiVED: Architectural checking via event digests for high performance validation., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)SAGA: SystemC acceleration on GPU architectures., , , and . DAC, page 115-120. ACM, (2012)Approximating checkers for simulation acceleration., , , , , , and . DATE, page 153-158. IEEE, (2012)Checking architectural outputs instruction-by-instruction on acceleration platforms., , , , and . DAC, page 955-961. ACM, (2012)Activity-based refinement for abstraction-guided simulation., and . HLDVT, page 146-153. IEEE Computer Society, (2009)GCS: High-performance gate-level simulation with GPGPUs., , and . DATE, page 1332-1337. IEEE, (2009)