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Test Set Stripping Limiting the Maximum Number of Specified Bits.

, , , and . DELTA, page 581-586. IEEE Computer Society, (2008)

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Self-Test and Diagnosis for Self-Aware Systems., and . IEEE Des. Test, 35 (5): 7-18 (2018)Efficient BDD-based Fault Simulation in Presence of Unknown Values., , , , and . Asian Test Symposium, page 383-388. IEEE Computer Society, (2011)Autonomous Testing for 3D-ICs with IEEE Std. 1687., , , and . ATS, page 215-220. IEEE Computer Society, (2016)Test Set Stripping Limiting the Maximum Number of Specified Bits., , , and . DELTA, page 581-586. IEEE Computer Society, (2008)Power-aware test generation with guaranteed launch safety for at-speed scan testing., , , , , , , and . VTS, page 166-171. IEEE Computer Society, (2011)An on-chip self-test architecture with test patterns recorded in scan chains., , and . ITC, page 1-10. IEEE, (2016)Efficient fault simulation on many-core processors., , , and . DAC, page 380-385. ACM, (2010)Structure-Oriented Test of Reconfigurable Scan Networks., , and . ATS, page 127-132. IEEE Computer Society, (2017)Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses., , , , and . ITC, page 1-10. IEEE, (2019)LCTI-SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing., , , , , and . IEEE Des. Test, 30 (4): 60-70 (2013)