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Disambiguation of "Kaeslin, Hubert"

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SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC.

, , , , , , , , and . ASAP, page 25-29. IEEE Computer Society, (2014)

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Edgar André Kaeslin

Therese Kaeslin-Weibel

Hubert Hörterer

Hubert Gabel

Thomas Hübert

 

Other publications of authors with the same name

A 2 Gb/s balanced AES crypto-chip implementation., , , , , , and . ACM Great Lakes Symposium on VLSI, page 39-44. ACM, (2004)Compressive sensing for WiFi-based passive bistatic radar., , and . EUSIPCO, page 1444-1448. IEEE, (2012)42% power savings through glitch-reducing clocking strategy in a hearing aid application., , , , and . ISCAS, IEEE, (2006)Variable delay ripple carry adder with carry chain interrupt detection., , , and . ISCAS (5), page 113-116. IEEE, (2003)The impact of transistor sizing on power efficiency in submicron CMOS circuits., and . IEEE J. Solid State Circuits, 32 (7): 1142-1145 (1997)A 0.67-mm2 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids., , , , , , , , and . ECCTD, page 141-144. IEEE, (2005)Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC., , , , and . FMGALS@MEMOCODE, volume 146 of Electronic Notes in Theoretical Computer Science, page 133-149. Elsevier, (2005)Automatic multiview synthesis - Towards a mobile system on a chip., , , , and . VCIP, page 1-4. IEEE, (2015)MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping., , , , , and . ESSCIRC, page 61-64. IEEE, (2013)Stochastic Methods for Transistor Size Optimization of CMOS VLSI Circuits., , and . PPSN, volume 1141 of Lecture Notes in Computer Science, page 849-858. Springer, (1996)