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Disambiguation of "Marchand, Cédric"

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Architecture and Finite Precision Optimization for Layered LDPC Decoders.

, , and . J. Signal Process. Syst., 65 (2): 185-197 (2011)

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Cédric Bodet

Cédric Müller

Cédric Allène

Cédric Joffroy

Cédric Penet

 

Other publications of authors with the same name

Conflict resolution for pipelined layered LDPC decoders., , , and . SiPS, page 220-225. IEEE, (2009)Conflict Resolution by Matrix Reordering for DVB-T2 LDPC Decoders., , , and . GLOBECOM, page 1-6. IEEE, (2009)NB-LDPC check node with pre-sorted input., and . ISTC, page 196-200. IEEE, (2016)Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (1): 97-109 (2018)FeFET based Logic-in-Memory design methodologies, tools and open challenges., , , , , and . VLSI-SoC, page 1-6. IEEE, (2023)Non Volatile Operators Emulation Platform., , and . NANOARCH, page 15:1-15:6. ACM, (2023)Design and Characterization of the TERO-PUF on SRAM FPGAs., , and . ISVLSI, page 134-139. IEEE Computer Society, (2016)Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices., , , , , , , , , and 2 other author(s). VLSI-SoC, page 180-183. IEEE, (2018)Hardware Discrete Channel Emulator., , , and . HPCS, page 452-458. IEEE, (2010)LDPC decoder architecture for DVB-S2 and DVB-S2X standards., and . SiPS, page 1-5. IEEE, (2015)