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Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads.

S. Pugsley, J. Jestes, R. Balasubramonian, V. Srinivasan, A. Buyuktosunoglu, A. Davis, and F. Li. IEEE Micro, 34 (4): 44-52 (2014)

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Vijayalakshmi Sethuraman

R Srinivasan

Sadagopan Srinivasan

Srinivasan Rajaraman

Srinivasan Seetharaman

Other publications of authors with the same name

On the Nature of Cache Miss Behavior: Is It √2?A. Hartstein, V. Srinivasan, T. Puzak, and P. Emma. J. Instruction-Level Parallelism, (2008)Workload-aware Automatic Parallelization for Multi-GPU DNN Training.S. Shin, Y. Jo, J. Choi, S. Venkataramani, V. Srinivasan, and W. Sung. CoRR, (2018)ScaleCom: Scalable Sparsified Gradient Compression for Communication-Efficient Distributed Training.C. Chen, J. Ni, S. Lu, X. Cui, P. Chen, X. Sun, N. Wang, S. Venkataramani, V. Srinivasan, W. Zhang and 1 other author(s). CoRR, (2021)Efficient AI System Design With Cross-Layer Approximate Computing.S. Venkataramani, X. Sun, N. Wang, C. Chen, J. Choi, M. Kang, A. Agarwal, J. Oh, S. Jain, T. Babinsky and 30 other author(s). Proc. IEEE, 108 (12): 2232-2250 (2020)RECAP: A region-based cure for the common cold (cache).J. Zebchuk, H. Cain, X. Tong, V. Srinivasan, and A. Moshovos. HPCA, page 83-94. IEEE Computer Society, (2013)Co-designing accelerators and SoC interfaces using gem5-Aladdin.Y. Shao, S. Xi, V. Srinivasan, G. Wei, and D. Brooks. MICRO, page 48:1-48:12. IEEE Computer Society, (2016)Evaluating the performance of active cache management schemes.E. Tam, J. Rivers, V. Srinivasan, G. Tyson, and E. Davidson. ICCD, page 368-375. IEEE Computer Society, (1998)Big Chips.A. Kahng, and V. Srinivasan. IEEE Micro, 31 (4): 3-5 (2011)A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.S. Lee, A. Agrawal, J. Silberman, M. Ziegler, M. Kang, S. Venkataramani, N. Cao, B. Fleischer, M. Guillorn, M. Cohen and 34 other author(s). IEEE J. Solid State Circuits, 57 (1): 182-197 (2022)DeepTools: Compiler and Execution Runtime Extensions for RaPiD AI Accelerator.S. Venkataramani, J. Choi, V. Srinivasan, W. Wang, J. Zhang, M. Schaal, M. Serrano, K. Ishizaki, H. Inoue, E. Ogawa and 3 other author(s). IEEE Micro, 39 (5): 102-111 (2019)

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Disambiguation of "Srinivasan, Vijayalakshmi"

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Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads.

Please choose a person to relate this publication to

Vijayalakshmi Sethuraman

R Srinivasan

Sadagopan Srinivasan

Srinivasan Rajaraman

Srinivasan Seetharaman

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Srinivasan, Vijayalakshmi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads.

Please choose a person to relate this publication to

Vijayalakshmi Sethuraman

R Srinivasan

Sadagopan Srinivasan

Srinivasan Rajaraman

Srinivasan Seetharaman

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads.