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Disambiguation of "Brunhaver, John S."

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Automated Parallel Kernel Extraction from Dynamic Application Traces.

, , and . CoRR, (2020)

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S Danischewski

S Ulrich

S Hilt

S Bachmann

S Steinlechner

 

Other publications of authors with the same name

Building Conflict-Free FFT Schedules., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (4): 1146-1155 (2015)Avoiding game over: bringing design to the next level., , , , , , , , , and . DAC, page 623-629. ACM, (2012)Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor., , , , , , , , , and 33 other author(s). ISCAS, page 443-447. IEEE, (2022)Cyclebite: Extracting Task Graphs From Unstructured Compute-Programs., , , , , and . IEEE Trans. Computers, 73 (1): 221-234 (January 2024)Hardware implementation of micropolygon rasterization with motion and defocus blur., , and . High Performance Graphics, page 1-9. Eurographics Association, (2010)Automated Parallel Kernel Extraction from Dynamic Application Traces., , and . CoRR, (2020)Efficient Error Detection for Matrix Multiplication With Systolic Arrays on FPGAs., , and . IEEE Trans. Computers, 72 (8): 2390-2403 (August 2023)Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells., , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (7): 1164-1168 (2019)Physically Unclonable Functions Using Foundry SRAM Cells., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (3): 955-966 (2019)Self-correcting Flip-flops for Triple Modular Redundant Logic in a 12-nm Technology., , , , , , , , , and . ISCAS, page 1205-1209. IEEE, (2022)