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DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications.

, , , and . FPL, page 1-9. IEEE, (2016)

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Stream Processing Dual-Track CGRA for Object Inference., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (6): 1098-1111 (2018)LETA: A lightweight exchangeable-track accelerator for efficientnet based on FPGA., , , , , , and . FPT, page 1-9. IEEE, (2021)MRI-based brain tumor segmentation using FPGA-accelerated neural network., , , , , , , , , and 1 other author(s). BMC Bioinform., 22 (1): 421 (2021)SWM: A High-Performance Sparse-Winograd Matrix Multiplication CNN Accelerator., , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (5): 936-949 (2021)Implementation of high performance hardware architecture of OpenSURF algorithm on FPGA., , , , , and . FPT, page 152-159. IEEE, (2013)Acceleration of Rotated Object Detection on FPGA., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (4): 2296-2300 (2022)Unified Accelerator for Attention and Convolution in Inference Based on FPGA., , , , , and . ISCAS, page 1-5. IEEE, (2023)High Throughput CNN Accelerator Design Based on FPGA., , , and . FPT, page 274-277. IEEE, (2018)DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications., , , and . FPL, page 1-9. IEEE, (2016)A hardware implementation of Bag of Words and Simhash for image recognition., , , , , , and . FPT, page 418-421. IEEE, (2013)