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A Stimulus/Response System Based on Hierarchical Timing Diagrams.

, , and . ICCAD, page 358-361. IEEE Computer Society, (1991)

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Local microcode generation in system design., , , and . Code Generation for Embedded Processors, page 171-187. Kluwer, (1994)A Test Design Methodology for Protocol Testing., , and . IEEE Trans. Software Eng., 13 (5): 518-531 (1987)Self-Adjusting Networks for VLSI Simulation., and . IEEE Trans. Computers, 36 (9): 1114-1120 (1987)Synthesis of Minimal Binary Decision Trees., , and . IEEE Trans. Computers, 28 (7): 472-482 (1979)An Approach to Unified Methodology of Combinational Switching Circuits., and . IEEE Trans. Computers, 26 (8): 745-756 (1977)Some Experience with the Use of Formal Specifications., , , , , , , , and . PSTV, page 171-185. North-Holland, (1982)CHESHIRE: An Object-Oriented Integration of VLSI CAD Tools., , , and . DAC, page 750-756. IEEE Computer Society Press / ACM, (1987)Model Reductions and a Case Study., and . FMCAD, volume 1954 of Lecture Notes in Computer Science, page 299-315. Springer, (2000)Some issues in protocol implementation testing.. Comput. Commun. Rev., 14 (2): 259-260 (1984)Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs)., , , and . Comput. J., 47 (1): 71-84 (2004)