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Disambiguation of "Hurst, Paul J."

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A Passive Switched-Capacitor Finite-Impulse-Response Equalizer.

, , , and . IEEE J. Solid State Circuits, 42 (2): 400-409 (2007)

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Tanja Hurst

Brigitte Hürst

Annette Hurst

Andreas Hurst

Walter Hurst

 

Other publications of authors with the same name

Effect of nonlinearity in the CMFB circuit that uses the differential-difference amplifier., and . ISCAS, IEEE, (2006)Correction to "Calibration of Sample-Time Error in a Two-Channel Time-Interleaved Analog-to-Digital Converter"., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (4): 822 (2005)Background interstage gain calibration technique for pipelined ADCs., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (1): 32-43 (2005)Digital Background Calibration of a Split Current-Steering DAC., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (8): 2854-2864 (2019)Overcoming the Effect of the Summation-Node Parasitic Pole in an Analog Equalizer., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (3): 652-663 (2012)A Passive Switched-Capacitor Finite-Impulse-Response Equalizer., , , and . IEEE J. Solid State Circuits, 42 (2): 400-409 (2007)A 20-Msample/s switched-capacitor finite-impulse-response filter using a transposed structure., , and . IEEE J. Solid State Circuits, 30 (12): 1350-1356 (December 1995)An analog background calibration technique for time-interleaved analog-to-digital converters., , , and . IEEE J. Solid State Circuits, 33 (12): 1912-1919 (1998)A 35 Mb/s mixed-signal decision-feedback equalizer for disk drives in 2-μm CMOS., , and . IEEE J. Solid State Circuits, 31 (9): 1258-1266 (1996)Analog timing recovery for a noise-predictive decision-feedback equalizer., , and . IEEE J. Solid State Circuits, 38 (2): 338-342 (2003)