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Fast system-level exploration of memory architectures driven by energy-delay metrics.

, , , и . ISCAS (4), стр. 502-505. IEEE, (2001)

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William Pierson

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William Döhrmann

 

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The role of VHDL within the TOSCA hardware/software codesign framework., , , и . EURO-DAC, стр. 612-617. IEEE Computer Society, (1994)BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers., , , , , и . J. Parallel Distributed Comput., (2017)A sensor-less NBTI mitigation methodology for NoC architectures., и . SoCC, стр. 340-345. IEEE, (2012)Consolidation of multi-tier workloads with performance and reliability constraints., , , и . HPCS, стр. 74-83. IEEE, (2012)A new architecture for the automatic design of custom digital neural network., и . IEEE Trans. Very Large Scale Integr. Syst., 3 (4): 502-506 (1995)Power estimation of embedded systems: a hardware/software codesign approach., , , и . IEEE Trans. Very Large Scale Integr. Syst., 6 (2): 266-275 (1998)A design framework to efficiently explore energy-delay tradeoffs., , , и . CODES, стр. 260-265. ACM, (2001)Power optimization of system-level address buses based on software profiling., , , и . CODES, стр. 29-33. ACM, (2000)A Multi-Level DPM Approach for Real-Time DAG Tasks in Heterogeneous Processors., , , и . RTSS, стр. 14-26. IEEE, (2021)Resource-Aware Application Execution Exploiting the BarbequeRTRM., , , , и . RES4ANT@DATE, том 1643 из CEUR Workshop Proceedings, стр. 3-7. CEUR-WS.org, (2016)