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Disambiguation of "Chung, Ching-Che"

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A 0.5V/1.0V fast lock-in ADPLL for DVFS battery-powered devices.

, , and . VLSI-DAT, page 1-4. IEEE, (2013)

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Chung-Che Kuo

Chung-Ching Shen

Ching-Chung Lin

Wilhelm Ching

Paisal Chingduang

 

Other publications of authors with the same name

A Wide-Range Low-Cost All-Digital Duty-Cycle Corrector., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2487-2496 (2015)A Low-Cost Low-Power All-Digital Spread-Spectrum Clock Generator., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (5): 983-987 (2015)An all-digital phase-locked loop compiler with liberty timing files., , and . VLSI-DAT, page 1-4. IEEE, (2014)A 0.5V/1.0V fast lock-in ADPLL for DVFS battery-powered devices., , and . VLSI-DAT, page 1-4. IEEE, (2013)A sub-mW Multi-Tone CDMA Baseband Transceiver Chipset for Wireless Body Area Network Applications., , , and . ISSCC, page 364-609. IEEE, (2007)An Autocalibrated All-Digital Temperature Sensor for On-Chip Thermal Monitoring., and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (2): 105-109 (2011)A cell-based 5-MHz on-chip clock generator., and . Turkish J. Electr. Eng. Comput. Sci., (2017)Built-in Self-Test Circuits for All-digital Phase-Locked Loops., , and . ICCE-TW, page 1-2. IEEE, (2019)A high-resolution and one-cycle conversion time-to-digital converter architecture for PET image applications., , , and . EMBC, page 2461-2464. IEEE, (2013)A 0.52/1 V Fast Lock-in ADPLL for Supporting Dynamic Voltage and Frequency Scaling., , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (1): 408-412 (2016)