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Design of a Stochastic Computing Architecture for the Phansalkar Algorithm., , , and . IEEE Trans. Very Large Scale Integr. Syst., 32 (3): 442-454 (March 2024)Design and Implementation of SRAM for LUT and CLB Using Clocking Mechanism in Quantum-Dot Cellular Automata., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (9): 3909-3913 (2022)A 15 W wireless power receiver with an improved full-wave synchronous rectifier., , , , , , and . IEICE Electron. Express, 15 (20): 20180732 (2018)DM-IMCA: A dual-mode in-memory computing architecture for general purpose processing., , , , , , , and . IEICE Electron. Express, 17 (4): 20200005 (2020)A novel control circuit for piezoelectric energy harvesting., , , , and . Microelectron. J., (2021)Using correction parameters to improve real-time video interpolation in low-cost VLSI implementation., , , , and . Microelectron. J., (2021)A 30MHz Delay-Line-Based Buck Converter with 5.7%-94.8% Switching Duty Cycle., , , , and . APCCAS, page 53-56. IEEE, (2019)End-to-End Background Subtraction via a Multi-Scale Spatio-Temporal Model., , , , and . IEEE Access, (2019)Spars: A Full Flow Quantum-Dot Cellular Automata Circuit Design Tool., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (4): 1233-1237 (2021)Weighted-Adder-Based Polynomial Computation Using Correlated Unipolar Stochastic Bitstreams., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (11): 4528-4532 (2022)