( en | de | ru )

 

Disambiguation of "Deval, Yann"

Author of the publication

copydeleteadd this publication to your clipboard
A novel delta sigma built-in-current-sensor as a signal strength indicator for RF transceiver reconfiguration.

, , , and . SBCCI, ACM, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Gabriele Devallet

Georgios Yannis

Christos Yannissis

Yann Malato

Role of the IKK complex during liver regeneration: analysis of the differential role of IKKβ/IKK2 IKKbeta/IKK2 and IKKγ/Nemo IKKgamma/Nemo during liver regeneration. TU Aachen, (2009)

Theodoros Yannacopoulos

 

Other publications of authors with the same name

Full Software Radio transceivers., , , , , , , and . ASICON, page 1-4. IEEE, (2013)A novel delta sigma built-in-current-sensor as a signal strength indicator for RF transceiver reconfiguration., , , and . SBCCI, ACM, (2009)A study on FBAR Filters reconfiguration., , , , , and . ICECS, page 1-4. IEEE, (2005)Design methodology for low power RF LNA based on the figure of merit and the inversion coefficient., , , , and . ICECS, page 478-481. IEEE, (2014)Intra-body communications - Radio-frequency versus ultrasonic., , , and . ICECS, page 347-350. IEEE, (2014)A low-power 2 GHz discrete time weighting system dedicated to Sampled Analog Signal Processing., , , , , and . ICECS, page 57-60. IEEE, (2011)Experimental Demonstration of a 65 nm Integrated CMOS Waveform Generator for 5G sub-6GHz Standard., , , and . ICECS, page 181-184. IEEE, (2018)Design methodology for ultra low-power analog circuits using next generation BSIM6 MOSFET compact model., , , , , and . Microelectron. J., 44 (7): 570-575 (2013)The Experimental Demonstration of a SASP-Based Full Software Radio Receiver., , , , , and . IEEE J. Solid State Circuits, 45 (5): 979-988 (2010)Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI., , , , , , and . VLSI-SoC (Selected Papers), volume 621 of IFIP Advances in Information and Communication Technology, page 1-19. Springer, (2020)