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CMOS Circuits for On-Chip Capacitance Ratio Testing or Sensor Readout.

, and . ISCAS, page 1848-1851. IEEE, (1995)

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Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop., , , , and . ISCAS (4), page 743-746. IEEE, (2002)Switched-capacitor track-and-hold amplifier with low sensitivity to op-amp imperfections., and . ISCAS, IEEE, (2006)A Segmented Data-Weighted-Averaging Technique., and . ISCAS, page 481-484. IEEE, (2007)Mixed-Order Sturdy MASH Delta-Sigma Modulator., , , and . ISCAS, page 257-260. IEEE, (2007)A new zero-optimization scheme for noise-coupled ΔΣ ADCs., , and . ISCAS, page 2163-2166. IEEE, (2010)High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters., , , , and . ISCAS, page 345-348. IEEE, (1994)A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications., , , and . ISCAS (1), page 433-436. IEEE, (2004)An efficient ΔΣ ADC architecture for low oversampling ratios., and . IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (1): 63-71 (2004)Switched-Capacitor Integrator with Slew-Rate Enhancement and Low Distortion., , and . MWSCAS, page 150-153. IEEE, (2021)Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems., , , , and . MWSCAS, page 262-265. IEEE, (2014)