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A Probabilistic Framework for Compiler Optimization with Multithread Power-Gating Controls.

, , , and . ICPP Workshops, page 281-288. IEEE Computer Society, (2016)

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Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files., , , , and . ACM Trans. Design Autom. Electr. Syst., 23 (2): 18:1-18:25 (2018)Array Operation Synthesis to Optimize HPF Programs., , and . ICPP, Vol. 3, page 1-8. IEEE Computer Society, (1996)0-8186-7623-X.An Array Operation Synthesis Scheme to Optimize Fortran 90 Programs., , and . PPoPP, page 112-122. ACM, (1995)Energy Efficient Affine Register File for GPU Microarchitecture., , , and . ICPP Workshops, page 52-58. IEEE Computer Society, (2016)Parallelization of Belief Propagation on Cell Processors for Stereo Vision., , , and . ACM Trans. Embed. Comput. Syst., 11 (S1): 13 (2012)Towards the Parallelisation of Pressure Correction Method on Unstructured Grids., , , and . Parallel CFD, page 249-256. North Holland, (1997)An Expression-Rewriting Framework to Generic Communication Sets for HPF Programs with Block-Cyclic Distribution., and . IPPS/SPDP, page 62-68. IEEE Computer Society, (1998)Building Ontology for Optimization and Composition of Parallel JavaBean Programs., , and . ISPAN, page 233-238. IEEE Computer Society, (2002)PAC DSP Core and Application Processors., , , , , and . ICME, page 289-292. IEEE Computer Society, (2006)Enabling Streaming Remoting on Embedded Dual-Core Processors., , , , and . ICPP, page 35-42. IEEE Computer Society, (2008)