Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors., , and . IEEE Comput. Archit. Lett., 17 (2): 175-178 (2018)Efficient Program Power Behavior Characterization., , and . HiPEAC, volume 4367 of Lecture Notes in Computer Science, page 183-197. Springer, (2007)Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization., , and . Trans. High Perform. Embed. Archit. Compil., (2009)Mixed-Signal Approximate Computation: A Neural Predictor Case Study., , and . IEEE Micro, 29 (1): 104-115 (2009)B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors., , and . IEEE Comput. Archit. Lett., 11 (2): 41-44 (2012)Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive Prefetching., , and . IEEE Comput. Archit. Lett., 22 (1): 17-20 (January 2023)The Camino Compiler infrastructure., , , and . SIGARCH Comput. Archit. News, 33 (5): 3-8 (2005)Guest Editor's Introduction.. J. Instruction-Level Parallelism, (2007)The impact of cache inclusion policies on cache management techniques., and . MEMSYS, page 428-438. ACM, (2019)Fast Path-Based Neural Branch Prediction.. MICRO, page 243-252. IEEE Computer Society, (2003)