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General-purpose code acceleration with limited-precision analog computation.

, , , , , , , и . ISCA, стр. 505-516. IEEE Computer Society, (2014)

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Doug Rugh

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Architectural versus physical solutions for on-chip communication challenges.. CODES+ISSS, стр. 74. ACM, (2003)Neural acceleration for general-purpose approximate programs., , , и . Commun. ACM, 58 (1): 105-115 (2015)Static energy reduction techniques for microprocessor caches., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 11 (3): 303-313 (2003)The SimpleScalar tool set, version 2.0., и . SIGARCH Comput. Archit. News, 25 (3): 13-25 (1997)Neural Acceleration for General-Purpose Approximate Programs., , , и . IEEE Micro, 33 (3): 16-27 (2013)Scalable Hardware Memory Disambiguation for High-ILP Processors., , , , и . IEEE Micro, 24 (6): 118-127 (2004)Designing a Modern Memory Hierarchy with Hardware Prefetching., , и . IEEE Trans. Computers, 50 (11): 1202-1218 (2001)Low-power, high-performance analog neural branch prediction., , и . MICRO, стр. 447-458. IEEE Computer Society, (2008)Universal Mechanisms for Data-Parallel Architectures., , , и . MICRO, стр. 303-314. IEEE Computer Society, (2003)Neural Acceleration for General-Purpose Approximate Programs., , , и . MICRO, стр. 449-460. IEEE Computer Society, (2012)