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On designing circuit primitives for cortical processors with memristive hardware.

, , , , and . SoCC, page 371-376. IEEE, (2014)

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Reconfigurable N-level memristor memory design., , , and . IJCNN, page 3042-3048. IEEE, (2011)Design-time performance evaluation of thermal management policies for SRAM and RRAM based 3D MPSoCs., , and . ACM Great Lakes Symposium on VLSI, page 177-182. ACM, (2012)Synaptic Scaling and Optimal Bias Adjustments for Power Reduction in Neuromorphic Systems.. MWSCAS, page 748-752. IEEE, (2023)Enhancing Adversarial Attacks on Single-Layer NVM Crossbar-Based Neural Networks with Power Consumption Information.. SOCC, page 1-6. IEEE, (2022)Memristive Reservoir Computing Architecture for Epileptic Seizure Detection., , , and . BICA, volume 41 of Procedia Computer Science, page 249-254. Elsevier, (2014)A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits., , , and . ISCAS, page 1254-1257. IEEE, (2016)Periodic activation functions in memristor-based analog neural networks., , and . IJCNN, page 1-7. IEEE, (2013)Temperature Sensing RRAM Architecture for 3-D ICs., and . IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 878-887 (2014)An FPGA Implementation of a Time Delay Reservoir Using Stochastic Logic., , and . JETC, 14 (4): 46:1-46:15 (2018)Memristor-Based Neural Logic Blocks for Nonlinearly Separable Functions., , , , and . IEEE Trans. Computers, 62 (8): 1597-1606 (2013)