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SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis., , and . ICCAD, page 1-4. ACM, (2019)Building Trustworthy Systems Using Untrusted Components: A High-Level Synthesis Approach., , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (9): 2946-2959 (2016)DETERRENT: detecting trojans using reinforcement learning., , , , and . DAC, page 697-702. ACM, (2022)Towards provably-secure performance locking., , , , , and . DATE, page 1592-1597. IEEE, (2018)Routing perturbation for enhanced security in split manufacturing., , , and . ASP-DAC, page 605-510. IEEE, (2017)On designing optimal camouflaged layouts., , and . HOST, page 169. IEEE Computer Society, (2017)Vulnerability Assessment of Ciphers To Fault Attacks Using Reinforcement Learning., , , , , and . IACR Cryptol. ePrint Arch., (2022)Guest Editors' Introduction: Competing to Secure SoCs., , , and . IEEE Des. Test, 38 (1): 5-6 (2021)Does logic locking work with EDA tools?, , and . USENIX Security Symposium, page 1055-1072. USENIX Association, (2021)SARLock: SAT attack resistant logic locking., , , and . HOST, page 236-241. IEEE Computer Society, (2016)