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TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity.

H. Wang, Z. He, T. Wang, J. He, X. Zhou, Y. Wang, L. Liu, N. Wu, M. Tian, and C. Shi. IEEE Trans. Biomed. Circuits Syst., 16 (4): 636-650 (2022)

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Liu Liu

Liyuan Wang-Scheerer

Yan Liu

Other publications of authors with the same name

A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.J. Yang, Z. Zhang, N. Qi, L. Liu, J. Liu, and N. Wu. Sci. China Inf. Sci., 62 (6): 62405:1-62405:16 (2019)A Discrete-Time Audio ΔΣ Modulator Using Dynamic Amplifier With Speed Enhancement and Flicker Noise Reduction Techniques.S. Ma, L. Liu, T. Fang, J. Liu, and N. Wu. IEEE J. Solid State Circuits, 55 (2): 333-343 (2020)Expert Finding in Heterogeneous Bibliographic Networks with Locally-trained Embeddings.H. Gui, Q. Zhu, L. Liu, A. Zhang, and J. Han. CoRR, (2018)A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR.Q. Liao, Y. Zhang, S. Ma, L. Wang, L. Li, G. Li, Z. Zhang, J. Liu, N. Wu, L. Liu and 3 other author(s). IEEE J. Solid State Circuits, 57 (3): 767-780 (2022)A2Text-Net: A Novel Deep Neural Network for Sarcasm Detection.L. Liu, J. Priestley, Y. Zhou, H. Ray, and M. Han. CogMI, page 118-126. IEEE, (2019)High-speed target tracking system based on multi-interconnection heterogeneous processor and multi-descriptor algorithm.J. Wang, Y. Yang, L. Liu, and N. Wu. Sci. China Inf. Sci., 62 (6): 69401:1-69401:3 (2019)High-speed visual target tracking with mixed rotation invariant description and skipping searching.Y. Yang, J. Yang, Z. Zhang, L. Liu, and N. Wu. Sci. China Inf. Sci., 60 (6): 62401 (2017)Contrast Subgraph Mining from Coherent Cores.J. Shang, X. Shi, M. Jiang, L. Liu, T. Hanratty, and J. Han. CoRR, (2018)Defend the Clique-based Attack for Data Privacy.M. Han, D. Miao, J. Wang, and L. Liu. COCOA, volume 11346 of Lecture Notes in Computer Science, page 262-280. Springer, (2018)A 0.9-2.25-GHz Sub-0.2-mW/GHz Compact Low-Voltage Low-Power Hybrid Digital PLL With Loop Bandwidth-Tracking Technique.Z. Zhang, J. Yang, L. Liu, P. Feng, J. Liu, and N. Wu. IEEE Trans. Very Large Scale Integr. Syst., 26 (5): 933-944 (2018)

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Disambiguation of "Liu, Liyuan"

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TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Liyuan Wang-Scheerer

Yan Liu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liu, Liyuan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Liyuan Wang-Scheerer

Yan Liu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity.