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24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS., , , , , , , and . ISSCC, page 420-422. IEEE, (2016)14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence., , , , , , , , , and 4 other author(s). ISSCC, page 250-251. IEEE, (2017)A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory., , , , , , , and . VLSIC, page 48-. IEEE, (2015)An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 50 (1): 375-390 (2015)SLC: Split-control Level Converter for dense and stable wide-range voltage conversion., , , and . ESSCIRC, page 478-481. IEEE, (2012)11.2 A 1Mb embedded NOR flash memory with 39µW program power for mm-scale high-temperature sensor nodes., , , , , , , , , and 6 other author(s). ISSCC, page 198-199. IEEE, (2017)A confidence-driven model for error-resilient computing., , , , , , and . DATE, page 1608-1613. IEEE, (2011)A Sub-mm3 Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry., , , , , , , , , and 11 other author(s). IEEE J. Solid State Circuits, 59 (4): 1110-1122 (April 2024)An Acoustic Signal Processing Chip With 142-nW Voice Activity Detection Using Mixer-Based Sequential Frequency Scanning and Neural Network Classification., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 54 (11): 3005-3016 (2019)A Modular 1 mm3 Die-Stacked Sensing Platform With Low Power I2C Inter-Die Communication and Multi-Modal Energy Harvesting., , , , , , , , , and . IEEE J. Solid State Circuits, 48 (1): 229-243 (2013)