Author of the publication

Error analysis and inter-cell interference mitigation in multi-level cell flash memories.

, , and . ICC, page 271-276. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Circuit-Size Reduction for Parallel Chien Search using Minimal Polynomial Degree Reduction., , , and . ISCAS, page 1-5. IEEE, (2019)Terminated LDPC convolutional codes over GF(2p)., , and . Allerton, page 195-200. IEEE, (2010)Integrated parallel interleaved concatenation for lowering error floors of LDPC codes., and . ISIT, page 3013-3017. IEEE, (2016)Design and Performance of Rate-Compatible Non-binary LDPC Convolutional Codes., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 94-A (11): 2135-2143 (2011)Iterative encoding with Gauss-Seidel method for spatially-coupled low-density lattice codes., , , and . ISIT, page 1737-1741. IEEE, (2012)Design of non-precoded protograph-based LDPC codes.. ISIT, page 2779-2783. IEEE, (2014)Threshold improvement of low-density lattice codes via spatial coupling., , , and . ICNC, page 1036-1040. IEEE Computer Society, (2012)Approximated EM Algorithms for Estimation of Unknown Coded Discrete Memoryless Channels., , , and . GLOBECOM, page 1-6. IEEE, (2020)7-Bit/2Cell (X3.5), 9-Bit/2Cell (X4.5) NAND Flash Memory: Half Bit technology., , , , , and . IMW, page 1-4. IEEE, (2023)Complete Multipartite Graph Codes., , and . ISITA, page 237-241. IEEE, (2018)