Author of the publication

FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing.

, , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (9): 2889-2902 (September 2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

PIMSim: A Flexible and Detailed Processing-in-Memory Simulator., , , , , and . IEEE Comput. Archit. Lett., 18 (1): 6-9 (2019)LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks., , , , and . IEEE Comput. Archit. Lett., 21 (1): 29-32 (2022)M-IVC: Applying multiple input vectors to co-optimize aging and leakage., and . Microelectron. J., 43 (11): 838-847 (2012)RBDCore: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines., , and . CoRR, (2023)RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (12): 3053-3064 (2015)Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (5): 531-540 (2007)Accelerating Convolutional Neural Networks in Frequency Domain via Kernel-Sharing Approach., , , , , and . ASP-DAC, page 733-738. ACM, (2023)CTA: Hardware-Software Co-design for Compressed Token Attention Mechanism., , , and . HPCA, page 429-441. IEEE, (2023)Wide Operational Range Processor Power Delivery Design for Both Super-Threshold Voltage and Near-Threshold Voltage Computing., , , and . J. Comput. Sci. Technol., 31 (2): 253-266 (2016)EcoUp: Towards Economical Datacenter Upgrading., , , and . IEEE Trans. Parallel Distributed Syst., 27 (7): 1968-1981 (2016)