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Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip.

, , , , , , , , and . ARITH, page 37-44. IEEE, (2018)

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Phase-Encoding for On-Chip Signalling., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (2): 535-545 (2008)Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip., , , , , , , , and . ARITH, page 37-44. IEEE, (2018)Blended Glial Cell's Spiking Neural Network., , , , , , , , , and . IEEE Access, (2023)Variability analysis of self-timed SRAM robustness., , , and . PATMOS, page 24-31. IEEE, (2013)An exponential function accelerator with radix-16 algorithm for spiking neural networks., , and . IEICE Electron. Express, 20 (8): 20220393 (2023)Design of a DCO based on worst-case delay of a self-timed counter and a digitally controllable delay path., , , and . NEWCAS, page 1-4. IEEE, (2016)ORSAS: An Output Row-Stationary Accelerator for Sparse Neural Networks., , and . IEEE Access, (2023)PSK Signalling on NoC Buses., , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 286-296. Springer, (2005)Multiple-Rail Phase-Encoding for NoC., , , , and . ASYNC, page 107-116. IEEE Computer Society, (2006)High-order reconfigurable FIR filter design based on statistical analysis of CSD coefficients., , , , , and . FPT, page 402-405. IEEE, (2013)