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Disambiguation of "Runge, Marcel"

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An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter.

, , , , and . IEEE J. Solid State Circuits, 58 (8): 2288-2299 (2023)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Philipp Runge

Die kollektive Lizenzierung von Onlinenutzungsrechten für Musik im europäischen Binnenmarkt. Uni Düsseldorf, (2009)

Marcel Fiege

Hierarchische Selbstorganisation von Helicaten mit substituierten 8-Hydroxychinolinliganden. TU Aachen, (2009)

Gerda Runge

Peter Runge

Manfred Runge

 

Other publications of authors with the same name

A digital compensation method canceling static and non-linear time-variant feedback DAC errors in ΣΔ analog-to-digital converters., and . ISCAS, page 1-4. IEEE, (2017)Correlation Based Time-Variant DAC Error Estimation in Continuous-Time ∑Δ ADCs With Pseudo Random Noise., and . ISCAS, page 1-5. IEEE, (2018)A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOI., , , and . ISCAS, page 1-4. IEEE, (2019)A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS., , , , and . CICC, page 1-2. IEEE, (2022)A Sub-Sampling Beam-Forming Summation Track and Hold for Software Defined Radio., , , and . ISCAS, page 1-5. IEEE, (2020)A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX., , , and . ISCAS, page 1-5. IEEE, (2020)A Temperature and Process Corner Insensitive Design Method for Digital Circuits in 40nm CMOS., , and . MWSCAS, page 779-782. IEEE, (2018)Optimized Zero Placement within Noise Coupling Transfer Functions for Oversampled ADCs., , and . ISCAS, page 1-5. IEEE, (2019)An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter., , , , and . IEEE J. Solid State Circuits, 58 (8): 2288-2299 (2023)A Dynamic Body-Bias Linearization Technique Enabling Wide-Band GmC based Continous-Time Sigma-Delta Converters in 22 nm FD-SOI CMOS., , and . MWSCAS, page 1090-1093. IEEE, (2021)