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Automated test bench generation for high-level synthesis flow ABELITE., , , , and . EWDTS, page 13-16. IEEE Computer Society, (2011)Designing fault tolerant FSM by nano-PLA., , , and . IOLTS, page 229-234. IEEE Computer Society, (2009)Minimization of Algorithmic State Machines.. EUROMICRO, page 10176-10179. IEEE Computer Society, (1998)PSL assertion checkers synthesis with ASM based HLS tool ABELITE., , , and . LATW, page 1-6. IEEE Computer Society, (2012)CAD System for ASM and FSM Synthesis.. FPL, volume 1482 of Lecture Notes in Computer Science, page 119-128. Springer, (1998)