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A global communication optimization technique based on data-flow analysis and linear algebra.

, , , , and . ACM Trans. Program. Lang. Syst., 21 (6): 1251-1297 (1999)

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Functional abstraction of logic gates for switch-level simulation., , , and . EURO-DAC, page 329-333. EEE Computer Society, (1991)Optimization by Simulated Evolution with Applications to Standard Cell Placement., and . DAC, page 20-25. IEEE Computer Society Press, (1990)Potential-NRG: Placement with Incomplete Data., , and . DAC, page 279-282. ACM Press, (1998)Streaming Implementation of the ZLIB Decoder Algorithm on an FPGA., , and . ISCAS, page 2329-2332. IEEE, (2009)The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive., and . IEEE Trans. Computers, 38 (1): 30-46 (1989)Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults., and . IEEE Trans. Computers, 43 (7): 841-848 (1994)Global optimization techniques for automatic parallelization of hybrid applications., and . ICS, page 166-180. ACM, (2001)Multi-state Discriminative Video Segment Selection for Complex Event Classification., and . ACCV (5), volume 9007 of Lecture Notes in Computer Science, page 162-177. Springer, (2014)Interprocedural Array Redistribution Data-Flow Analysis., , and . LCPC, volume 1239 of Lecture Notes in Computer Science, page 435-449. Springer, (1996)A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs., , , , , , and . IWDC, volume 2571 of Lecture Notes in Computer Science, page 246-256. Springer, (2002)