( en | de | ru )

 

Disambiguation of "Millican, Spencer K."

Author of the publication

copydeleteadd this publication to your clipboard
CryptIP: An Approach for Encrypting Intellectual Property Cores with Simulation Capabilities.

, , and . VLSID, page 92-97. IEEE Computer Society, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Robert Spencer

Spencer Behmer

Alexander Spencer

Shawal Spencer

Spencer Richmond

 

Other publications of authors with the same name

Simulating and Evaluating a Quaternary Logic FPGA Based on Floating-gate Memories and Voltage Division., , , and . FPGA, page 226. ACM, (2021)A Test Partitioning Technique for Scheduling Tests for Thermally Constrained 3D Integrated Circuits., and . VLSID, page 20-25. IEEE Computer Society, (2014)Linear Programming Formulations for Thermal-Aware Test Scheduling of 3D-Stacked Integrated Circuits., and . Asian Test Symposium, page 37-42. IEEE Computer Society, (2012)Applying Neural Networks to Delay Fault Testing: Test Point Insertion and Random Circuit Training., , , and . ATS, page 13-18. IEEE, (2019)Machine Intelligence for Efficient Test Pattern Generation., , and . ITC, page 1-5. IEEE, (2020)CryptIP: An Approach for Encrypting Intellectual Property Cores with Simulation Capabilities., , and . VLSID, page 92-97. IEEE Computer Society, (2014)Special Session: Delay Fault Testing - Present and Future., , , and . VTS, page 1-10. IEEE, (2019)Unsupervised Learning in Test Generation for Digital Integrated Circuits., , and . ETS, page 1-4. IEEE, (2021)A Pragmatic Quaternary FPGA Implemented with Floating Gate Memories., , , and . ISMVL, page 166-171. IEEE, (2021)Special Session - Machine Learning in Test: A Survey of Analog, Digital, Memory, and RF Integrated Circuits., , and . VTS, page 1-14. IEEE, (2021)