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Fracturable DSP Block for Multi-context Reconfigurable Architectures., , , , and . CSSP, 36 (7): 3020-3033 (2017)Design Abstraction for Autonomous Adaptive Hardware Systems on FPGAs.. AHS, page 142-147. IEEE, (2018)An End-to-End Multi-Standard OFDM Transceiver Architecture Using FPGA Partial Reconfiguration., , and . IEEE Access, (2017)Mapping for Maximum Performance on FPGA DSP Blocks., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (4): 573-585 (2016)Iris: an architecture for cognitive radio networking testbeds., , , , , , , , and . IEEE Commun. Mag., 48 (9): 114-122 (2010)A model for distributed in-network and near-edge computing with heterogeneous hardware., and . Future Gener. Comput. Syst., (2020)Streaming Overlay Architecture for Lightweight LSTM Computation on FPGA SoCs., and . ACM Trans. Reconfigurable Technol. Syst., 16 (1): 8:1-8:26 (March 2023)Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (12): 2508-2521 (2021)Coarse Grained FPGA Overlay for Rapid Just-In-Time Accelerator Compilation., , and . IEEE Trans. Parallel Distributed Syst., 33 (6): 1478-1490 (2022)High Throughput Multidimensional Tridiagonal Systems Solvers on FPGAs., , , and . CoRR, (2022)