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The implications of working set analysis on supercomputing memory hierarchy design.

, , , and . ICS, page 332-340. ACM, (2005)

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Achieving Exascale Computing through Hardware/Software Co-design., , , and . EuroMPI, volume 6960 of Lecture Notes in Computer Science, page 5-7. Springer, (2011)Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory., , , and . ISVLSI, page 19-28. IEEE Computer Society, (2003)The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems., , and . Intelligent Memory Systems, volume 2107 of Lecture Notes in Computer Science, page 85-103. Springer, (2000)Scientific applications vs. SPEC-FP: a comparison of program behavior., , , and . ICS, page 66-74. ACM, (2006)A Hardware Acceleration Unit for MPI Queue Processing., , , , and . IPDPS, IEEE Computer Society, (2005)Low Latency, High Bisection-Bandwidth Networks for Exascale Memory Systems., , , , , , , , , and 1 other author(s). MEMSYS, page 62-73. ACM, (2016)On the Path to Exascale., , , , , , , , , and 3 other author(s). Int. J. Distributed Syst. Technol., 1 (2): 1-22 (2010)SST: A Scalable Parallel Framework for Architecture-Level Performance, Power, Area and Thermal Simulation., , , , and . Comput. J., 55 (2): 181-191 (2012)Simulating Red Storm: Challenges and Successes in Building a System Simulation., , and . IPDPS, page 1-10. IEEE, (2007)Enhancing NIC Performance for MPI using Processing-in-Memory., , , and . IPDPS, IEEE Computer Society, (2005)