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Accelerating Hash-Based Query Processing Operations on FPGAs by a Hash Table Caching Technique., , , , and . CARLA, volume 697 of Communications in Computer and Information Science, page 131-145. (2016)Demonstrating Reduced-Voltage FPGA-Based Neural Network Acceleration for Power-Efficiency., , and . FPL, page 371. IEEE, (2020)AxleDB: A novel programmable query processing platform on FPGA., , , , and . Microprocess. Microsystems, (2017)MoRS: An Approximate Fault Modeling Framework for Reduced-Voltage SRAMs., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (6): 1663-1673 (2022)Can We Trust Undervolting in FPGA-Based Deep Learning Designs at Harsh Conditions?, , , , and . IEEE Micro, 42 (3): 57-65 (2022)A Demo of FPGA Aggressive Voltage Downscaling: Power and Reliability Tradeoffs., , and . FPL, page 451-452. IEEE Computer Society, (2018)LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing., , , , , , , , , and 33 other author(s). DATE, page 169-174. IEEE, (2020)Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs., , , , , , and . RAPIDO@HiPEAC, page 29-34. ACM, (2024)A multi-bitwatermark generation algorithm with properties of error correction., and . Communication, Network, and Information Security, page 44-49. IASTED/ACTA Press, (2006)LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing., , , , , , , , , and 35 other author(s). CoRR, (2019)