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Benchmarking Heterogeneous HPC Systems Including Reconfigurable Fabrics: Community Aspirations for Ideal Comparisons.

, , and . HPEC, page 1-6. IEEE, (2018)

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Architecting Hard Crossbars on FPGAs and Increasing their Area Efficiency with Shadow Clusters., and . FPT, page 57-64. IEEE, (2007)Supergenes in a genetic algorithm for heterogeneous FPGA placement., , and . IEEE Congress on Evolutionary Computation, page 253-260. IEEE, (2013)VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling., , , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 4 (4): 32:1-32:23 (2011)Advancing genetic algorithm approaches to field programmable gate array placement with enhanced recombination operators., , , , , and . Evol. Intell., 7 (4): 183-200 (2014)READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications., , , , , , , and . ACM Trans. Embed. Comput. Syst., 18 (5s): 56:1-56:20 (2019)The VTR project: architecture and CAD for FPGAs from verilog to routing., , , , , , , , and . FPGA, page 77-86. ACM, (2012)A simple multi-player video game framework for experimenting and teaching cultural understanding., , , , and . MindTrek, page 422-425. ACM, (2016)CableS : Thread Control and Memory System Extensions for Shared Virtual Memory Clusters., and . WOMPAT, volume 2104 of Lecture Notes in Computer Science, page 170-184. Springer, (2001)A Verilog RTL Synthesis Tool for Heterogeneous FPGAs., and . FPL, page 305-310. IEEE, (2005)More graph comparison techniques on mind maps to provide students with feedback.. FIE, page 992-998. IEEE Computer Society, (2013)