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Audio and Video Technologies: Recent Advances in Consumer Electronics.

, и . IEEE Consumer Electron. Mag., 7 (5): 26 (2018)

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Suprasanna Sengupta

Anirban Banerjee

Anirban Bhunia

Anirban Bhattacharyya

Anirban Chakraborty

 

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User power-delay budget driven PSO based design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis., и . ISQED, стр. 289-292. IEEE, (2015)Designing Low-Cost Hardware Accelerators for CE Devices Hardware Matters., , , и . IEEE Consumer Electronics Magazine, 6 (4): 140-149 (2017)Multi-phase watermark for IP core protection., и . ICCE, стр. 1-3. IEEE, (2018)Low cost optimized Trojan secured schedule at behavioral level for single & Nested loop control data flow graphs (Invited Paper)., , и . Integr., (2017)Integrating physical level design and high level synthesis for simultaneous multi-cycle transient and multiple transient fault resiliency of application specific datapath processors., и . Microelectron. Reliab., (2016)Low Cost Dual-Phase Watermark for Protecting CE Devices in IoT Framework., и . Security and Fault Tolerance in Internet of Things, Springer, (2019)Robust Digital Signature to Protect IP Core against Fraudulent Ownership and Cloning., , и . ICCE-Berlin, стр. 1-3. IEEE, (2019)Time Varying vs. Fixed Acceleration Coefficient PSO Driven Exploration during High Level Synthesis: Performance and Quality Assessment., и . ICIT, стр. 281-286. IEEE, (2014)Facial Biometric for Securing Hardware Accelerators., и . IEEE Trans. Very Large Scale Integr. Syst., 29 (1): 112-123 (2021)Biometrics for Hardware Security and Trust: Discussion and Analysis., , и . IT Prof., 25 (4): 36-44 (июля 2023)