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Adapting cache line size to application behavior.

, , , , и . International Conference on Supercomputing, стр. 145-154. ACM, (1999)

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Nicolau Gonçalves

Claude Nicolau

Stéphane Nicolau

Alexandru Soceanu

Alexandru Lupa

 

Другие публикации лиц с тем же именем

Uniform Parallelism Exploitation in Ordinary Programs.. ICPP, стр. 614-618. IEEE Computer Society Press, (1985)Applying an Abstract Data Structure Description Approach to Parallelizing Scientific Pointer Programs., , и . ICPP (2), стр. 100-104. CRC Press, (1992)An Approach to Combine Predicated/Speculative Execution for Programs with Unpredictable Branches., , и . IFIP PACT, том A-50 из IFIP Transactions, стр. 147-156. North-Holland, (1994)Memory aware compilation through accurate timing extraction., , и . DAC, стр. 316-321. ACM, (2000)New directions in compiler technology for embedded systems (embedded tutorial)., , , и . ASP-DAC, стр. 409-414. ACM, (2001)Performance Characterization of Itanium® 2-Based Montecito Processor., , , , , , и . SPEC Benchmark Workshop, том 5419 из Lecture Notes in Computer Science, стр. 36-56. Springer, (2009)Author retrospective for a global resource-constrained parallelization technique., и . ICS 25th Anniversary, стр. 7-8. ACM, (2014)Cache-aware partitioning of multi-dimensional iteration spaces., , , , и . SYSTOR, стр. 15. ACM, (2009)Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor., , , , , , и . ICSAMOS, стр. 132-141. IEEE, (2008)Adapting cache line size to application behavior., , , , и . International Conference on Supercomputing, стр. 145-154. ACM, (1999)