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FastLanes: An FPGA accelerated GPU microarchitecture simulator.

K. Fang, Y. Ni, J. He, Z. Li, S. Mu, and Y. Deng. ICCD, page 241-248. IEEE Computer Society, (2013)

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Wenjing Shuai

Jianyun Shuai

Shuai Yuan

Yao Shuai

Yongtao Shuai

Other publications of authors with the same name

Toward Concurrent Lock-Free Queues on GPUs.X. Zhang, Y. Deng, and S. Mu. IEICE Trans. Inf. Syst., 97-D (7): 1901-1904 (2014)Exploiting the Task-Pipelined Parallelism of Stream Programs on Many-Core GPUs.S. Mu, D. Li, Y. Chen, Y. Deng, and Z. Wang. IEICE Trans. Inf. Syst., 96-D (10): 2194-2207 (2013)Zip: An Algorithm Based on Loser Tree for Common Contacts Searching in Large Graphs.H. Tang, S. Mu, J. Huang, J. Zhu, J. Chen, and R. Ding. J. Comput. Sci. Technol., 30 (4): 799-809 (2015)Toward Real-Time Ray Tracing: A Survey on Hardware Acceleration and Microarchitecture Techniques.Y. Deng, Y. Ni, Z. Li, S. Mu, and W. Zhang. ACM Comput. Surv., 50 (4): 58:1-58:41 (2017)Cloud Storage over Multiple Data Centers.S. Mu, M. Su, P. Gao, Y. Wu, K. Li, and A. Zomaya. Handbook on Data Centers, Springer, (2015)Verifiable Sustainability in Data Centers.S. Hussain, P. McDaniel, A. Gandhi, K. Ghose, K. Gopalan, D. Lee, Y. Liu, Z. Liu, S. Mu, and E. Zadok. CoRR, (2023)Fault-Tolerant Replication with Pull-Based Consensus in MongoDB.S. Zhou, and S. Mu. NSDI, page 687-703. USENIX Association, (2021)DepFast: Orchestrating Code of Quorum Systems.X. Luo, W. Shen, S. Mu, and T. Xu. USENIX Annual Technical Conference, page 557-574. USENIX Association, (2022)MultiAddIntent: Efficient RDF Data-Oriented Incremental Construction Concept Lattice Algorithm.L. Yang, G. Li, M. Xiao, S. Luo, Y. Tan, Z. Tang, and S. Mu. ISPA/BDCloud/SocialCom/SustainCom, page 806-814. IEEE, (2022)FastLanes: An FPGA accelerated GPU microarchitecture simulator.K. Fang, Y. Ni, J. He, Z. Li, S. Mu, and Y. Deng. ICCD, page 241-248. IEEE Computer Society, (2013)

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Disambiguation of "Mu, Shuai"

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FastLanes: An FPGA accelerated GPU microarchitecture simulator.

Please choose a person to relate this publication to

Wenjing Shuai

Jianyun Shuai

Shuai Yuan

Yao Shuai

Yongtao Shuai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mu, Shuai"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FastLanes: An FPGA accelerated GPU microarchitecture simulator.

Please choose a person to relate this publication to

Wenjing Shuai

Jianyun Shuai

Shuai Yuan

Yao Shuai

Yongtao Shuai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
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FastLanes: An FPGA accelerated GPU microarchitecture simulator.