( en | de | ru )

 

Disambiguation of "Kadlec, Jiri"

Author of the publication

copydeleteadd this publication to your clipboard
A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC^2.

, , , , , , , , , , , , , , and . SAFECOMP Workshops, volume 10489 of Lecture Notes in Computer Science, page 127-140. Springer, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Nicole Kadlec

Günther Jirikowski

Gustav Jirikowski

Nicole Kadlec

Kristina Kadlec

 

Other publications of authors with the same name

Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project., , , , , , , , , and 10 other author(s). DSD, page 378-385. IEEE, (2020)Lattice adaptive filter implementation for FPGA., , , , and . FPGA, page 246. ACM, (2003)Implementation of (Normalised) RLS Lattice on Virtex., , , , , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 91-100. Springer, (2001)Accelerating Microblaze Floating Point Operations., , and . FPL, page 621-624. IEEE, (2007)Dynamic placement applications into Self Adaptive network on FPGA., and . DDECS, page 453-456. IEEE Computer Society, (2011)FPGA Implementation of the Adpaptive Lattice Filter., , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 1095-1098. Springer, (2003)Transputer implementation of block regularized filtering.. Kybernetika, 32 (3): 235-250 (1996)HydroDesktop: Web services-based software for hydrologic data discovery, download, visualization, and analysis., , , , , and . Environ. Model. Softw., (2012)Design and Development of Web Services for Accessing Free Hydrological Data from the Czech Republic., and . ISESS, volume 359 of IFIP Advances in Information and Communication Technology, page 581-588. Springer, (2011)Video chain demonstrator on Xilinx Kintex7 FPGA with EdkDSP floating point accelerators.. SAMOS, page 310-314. IEEE, (2015)