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An Efficient FPGA Implementation of Principle Component Analysis based Network Intrusion Detection System.

A. Das, S. Misra, S. Joshi, J. Zambreno, G. Memik, and A. Choudhary. DATE, page 1160-1165. ACM, (2008)

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Joseph Ringwald

Joseph Schön

Joseph Stegemann

Joseph Welling

Joseph Mitsch

Other publications of authors with the same name

Perf-Sat: Runtime Detection of Performance Saturation for GPGPU Applications.M. Awatramani, J. Zambreno, and D. Rover. ICPP Workshops, page 1-8. IEEE Computer Society, (2014)Cache design for mixed criticality real-time systems.N. Kumar, S. Vyas, R. Cytron, C. Gill, J. Zambreno, and P. Jones. ICCD, page 513-516. IEEE Computer Society, (2014)Parallelizing Latent Semantic Indexing using an FPGA-based architecture.X. Wang, and J. Zambreno. ICCD, page 432-435. IEEE Computer Society, (2016)Architectures for Simultaneous Coding and Encryption Using Chaotic Maps.A. Pande, J. Zambreno, and P. Mohapatra. ISVLSI, page 351-352. IEEE Computer Society, (2011)An Efficient Architecture for Floating-Point Eigenvalue Decomposition.X. Wang, and J. Zambreno. FCCM, page 64-67. IEEE Computer Society, (2014)Analyzing the Energy-Efficiency of Vision Kernels on Embedded CPU, GPU and FPGA Platforms.M. Qasaimeh, J. Zambreno, P. Jones, K. Denolf, J. Lo, and K. Vissers. FCCM, page 336. IEEE, (2019)Exploring Area/Delay Tradeoffs in an AES FPGA Implementation.J. Zambreno, D. Nguyen, and A. Choudhary. FPL, volume 3203 of Lecture Notes in Computer Science, page 575-585. Springer, (2004)k-NN text classification using an FPGA-based sparse matrix vector multiplication accelerator.K. Townsend, S. Sun, T. Johnson, O. Attia, P. Jones, and J. Zambreno. EIT, page 257-263. IEEE, (2015)Enhancing Compiler Techniques for Memory Energy Optimizations.J. Zambreno, M. Kandemir, and A. Choudhary. EMSOFT, volume 2491 of Lecture Notes in Computer Science, page 364-381. Springer, (2002)An FPGA-based Hardware Accelerator for Iris Segmentation.J. Avey, P. Jones, and J. Zambreno. ReConFig, page 1-8. IEEE, (2018)

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Disambiguation of "Zambreno, Joseph"

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An Efficient FPGA Implementation of Principle Component Analysis based Network Intrusion Detection System.

Please choose a person to relate this publication to

Joseph Ringwald

Joseph Schön

Joseph Stegemann

Joseph Welling

Joseph Mitsch

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zambreno, Joseph"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An Efficient FPGA Implementation of Principle Component Analysis based Network Intrusion Detection System.

Please choose a person to relate this publication to

Joseph Ringwald

Joseph Schön

Joseph Stegemann

Joseph Welling

Joseph Mitsch

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An Efficient FPGA Implementation of Principle Component Analysis based Network Intrusion Detection System.