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Disambiguation of "Feng, Wu-Shiung"

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Using a multiple storage quad tree on a hierarchical VLSI compaction scheme.

, and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (5): 522-536 (1990)

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Xiao-Feng Wu

Ruey-Shiung Lin

Youn-Shiung Chen

Yühe Feng

Feng Yan

 

Other publications of authors with the same name

A knowledge-based program for compacting mask layout of integrated circuits., , , and . Comput. Aided Des., 23 (3): 223-231 (1991)A new control strategy for an artificial intelligence approach to VLSI layout compaction., , and . Integr., 10 (1): 55-70 (1990)MIMO Interconnects Order Reductions by Using the Multiple Point Adaptive-Order Rational Global Arnoldi Algorithm., , and . IEICE Trans. Electron., 89-C (6): 792-802 (2006)The Multiple Point Global Lanczos Method for MIMO Interconnect Model-Order Reductions., , and . APCCAS, page 1268-1271. IEEE, (2006)Using a multiple storage quad tree on a hierarchical VLSI compaction scheme., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (5): 522-536 (1990)New efficient designs for XOR and XNOR functions on the transistor level., , and . IEEE J. Solid State Circuits, 29 (7): 780-786 (July 1994)A 1.8 V, 0.3 mW, 10-bit SA-ADC with new self-timed timing control for biomedical applications., , , and . ISCAS (1), page 736-739. IEEE, (2005)Constrained via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems., , , and . DAC, page 60-65. ACM, (1991)Pipelining Extended Givens Rotation RLS Adaptive Filters., , , and . DELTA, page 466-473. IEEE Computer Society, (2002)Design of a lower-error fixed-width multiplier for speech processing application., , , , and . ISCAS (3), page 130-133. IEEE, (1999)