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Increasing Register File Immunity to Transient Errors.

, , and . DATE, page 586-591. IEEE Computer Society, (2005)

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Compiler-guided leakage optimization for banked scratch-pad memories., , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (10): 1136-1146 (2005)Estimating and reducing the memory requirements of signal processing codes for embedded systems., , , , and . IEEE Trans. Signal Process., 54 (1): 286-294 (2006)Impact of Write-Allocate Elimination on Fujitsu A64FX., , , and . HPC Asia Workshops, page 24-35. ACM, (2024)Compiling for memory emergency., , and . LCTES, page 213-221. ACM, (2005)Energy-conscious compilation based on voltage scaling., , , , , , and . LCTES-SCOPES, page 2-11. ACM, (2002)Compiler-directed thermal management for VLIW functional units., , , , and . LCTES, page 163-172. ACM, (2006)Morphable Convolutional Neural Network for Biomedical Image Segmentation., , , , , , and . DATE, page 1522-1525. IEEE, (2021)Exploiting VLIW schedule slacks for dynamic and leakage energy reduction., , , , , and . MICRO, page 102-113. ACM/IEEE Computer Society, (2001)Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors., and . MICRO, page 313-324. IEEE Computer Society, (2010)A Compiler Algorithm for Optimizing Locality in Loop Nests., , and . International Conference on Supercomputing, page 269-276. ACM, (1997)